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PDF LPC11C22 Data sheet ( Hoja de datos )
| Número de pieza | LPC11C22 | |
| Descripción | 32-bit ARM Cortex-M0 microcontroller | |
| Fabricantes | NXP Semiconductors | |
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LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller; 16/32 kB flash, 8 kB
SRAM; C_CAN
Rev. 2 — 3 December 2010
Product data sheet
1. General description
The LPC11Cx2/Cx4 are an ARM Cortex-M0 based, low-cost 32-bit MCU family, designed
for 8/16-bit microcontroller applications, offering performance, low power, simple
instruction set and memory addressing together with reduced code size compared to
existing 8/16-bit architectures.
The LPC11Cx2/Cx4 operate at CPU frequencies of up to 50 MHz.
The peripheral complement of the LPC11Cx2/Cx4 includes 16/32 kB of flash memory,
8 kB of data memory, one C_CAN controller, one Fast-mode Plus I2C-bus interface, one
RS-485/EIA-485 UART, two SPI interfaces with SSP features, four general purpose
counter/timers, a 10-bit ADC, and up to 40 general purpose I/O pins.
On-chip C_CAN drivers and flash In-System Programming tools via C_CAN are included.
In addition, the LPC11C22 and LPC11C24 parts include an on-chip, high-speed CAN
transceiver.
2. Features and benefits
System:
ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
Serial Wire Debug.
System tick timer.
Memory:
32 kB (LPC11Cx4) or 16 kB (LPC11Cx2) on-chip flash program memory.
8 kB SRAM data memory.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
bootloader software.
Flash ISP commands can be issued via UART or C_CAN.
Digital peripherals:
General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors.
40 GPIO pins on the LPC11C12/C14 parts; 36 GPIO pins on the LPC11C22/C24
parts.
GPIO pins can be used as edge and level sensitive interrupt sources.
High-current output driver (20 mA) on one pin.
High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus.
Four general purpose counter/timers with a total of four capture inputs and 13
(LPC11C12/C14) or 12 (LPC11C22/C24) match outputs.
http://www.Datasheet4U.com
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NXP Semiconductors
6. Pinning information
6.1 Pinning
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
PIO2_6 1
PIO2_0/DTR/SSEL1 2
RESET/PIO0_0 3
PIO0_1/CLKOUT/CT32B0_MAT2 4
VSS 5
XTALIN 6
XTALOUT 7
VDD 8
PIO1_8/CT16B1_CAP0 9
PIO0_2/SSEL0/CT16B0_CAP0 10
PIO2_7 11
PIO2_8 12
LPC11C12FBD48/301
LPC11C14FBD48/301
36 PIO3_0/DTR
35 R/PIO1_2/AD3/CT32B1_MAT1
34 R/PIO1_1/AD2/CT32B1_MAT0
33 R/PIO1_0/AD1/CT32B1_CAP0
32 R/PIO0_11/AD0/CT32B0_MAT3
31 PIO2_11/SCK0
30 PIO1_10/AD6/CT16B1_MAT1
29 SWCLK/PIO0_10/SCK0/CT16B0_MAT2
28 PIO0_9/MOSI0/CT16B0_MAT1
27 PIO0_8/MISO0/CT16B0_MAT0
26 PIO2_2/DCD/MISO1
25 PIO2_10
002aaf266
Fig 2. Pin configuration (LPC11C12/C14)
LPC11CX2_CX4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 3 December 2010
© NXP B.V. 2010. All rights reserved.
5 of 61
5 Page 
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
Table 4. LPC11C22/C24 pin description table
Symbol
Pin Start Type Reset Description
logic
state
inputs
[1]
PIO0_1/CLKOUT/ 4[3] yes I/O I; PU PIO0_1 — General purpose digital input/output pin. A LOW level on
CT32B0_MAT2
this pin during reset starts the flash ISP command handler via UART
(if PIO0_3 is HIGH) or via C_CAN (if PIO0_3 is LOW).
O-
CLKOUT — Clockout pin.
O- CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
PIO0_2/SSEL0/
CT16B0_CAP0
10[3] yes I/O I; PU PIO0_2 — General purpose digital input/output pin.
I/O -
SSEL0 — Slave Select for SPI0.
I- CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_3
14[3] yes I/O I; PU PIO0_3 — General purpose digital input/output pin. This pin is
monitored during reset: Together with a LOW level on pin PIO0_1, a
LOW level starts the flash ISP command handler via C_CAN and a
HIGH level starts the flash ISP command handler via UART.
PIO0_4/SCL
15[4] yes I/O I; IA PIO0_4 — General purpose digital input/output pin (open-drain).
I/O -
SCL — I2C-bus, open-drain clock input/output. High-current sink only
if I2C Fast-mode Plus is selected in the I/O configuration register.
PIO0_5/SDA
16[4] yes I/O I; IA PIO0_5 — General purpose digital input/output pin (open-drain).
I/O -
SDA — I2C-bus, open-drain data input/output. High-current sink only
if I2C Fast-mode Plus is selected in the I/O configuration register.
PIO0_6/SCK0
23[3] yes I/O I; PU PIO0_6 — General purpose digital input/output pin.
I/O -
SCK0 — Serial clock for SPI0.
PIO0_7/CTS
24[3] yes I/O I; PU PIO0_7 — General purpose digital input/output pin (high-current
output driver).
I-
CTS — Clear To Send input for UART.
PIO0_8/MISO0/
CT16B0_MAT0
27[3] yes I/O I; PU PIO0_8 — General purpose digital input/output pin.
I/O -
MISO0 — Master In Slave Out for SPI0.
O-
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
PIO0_9/MOSI0/
CT16B0_MAT1
28[3] yes I/O I; PU PIO0_9 — General purpose digital input/output pin.
I/O -
MOSI0 — Master Out Slave In for SPI0.
O-
CT16B0_MAT1 — Match output 1 for 16-bit timer 0.
SWCLK/PIO0_10/ 29[3] yes I
I; PU SWCLK — Serial wire clock.
SCK0/
CT16B0_MAT2
I/O -
I/O -
PIO0_10 — General purpose digital input/output pin.
SCK0 — Serial clock for SPI0.
O- CT16B0_MAT2 — Match output 2 for 16-bit timer 0.
R/PIO0_11/
AD0/
CT32B0_MAT3
32[5] yes -
I; PU R — Reserved. Configure for an alternate function in the IOCONFIG
block.
I/O -
PIO0_11 — General purpose digital input/output pin.
I-
AD0 — A/D converter, input 0.
O- CT32B0_MAT3 — Match output 3 for 32-bit timer 0.
PIO1_0 to PIO1_11
Port 1 — Port 1 is a 12-bit I/O port with individual direction and
function controls for each bit. The operation of port 1 pins depends
on the function selected through the IOCONFIG register block.
LPC11CX2_CX4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 3 December 2010
© NXP B.V. 2010. All rights reserved.
11 of 61
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LPC11C22.PDF ] | |
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