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Número de pieza | HD6433801FP | |
Descripción | Single-Chip Microcomputer | |
Fabricantes | Hitachi Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HD6433801FP (archivo pdf) en la parte inferior de esta página. Total 70 Páginas | ||
No Preview Available ! Hitachi Single-Chip Microcomputer
H8/3802 Series
H8/3802 HD6473802, HD6433802
H8/3801 HD6433801
H8/3800 HD6433800
Hardware Manual
ADE-602-203A
Rev. 2.0
1/9/01
Hitachi Ltd.
1 page Section
Page
Item
Description
8.11.2 Register
Configuration and
Descriptions
168, 169 Serial Port Control Register
(SPCR)
Bits 4, 1, and 0, and
description amended
8.12 Application Note 170
8.12.1 How to Handle an Unused Description added
Pin
9.1 Overview
171 Table 9.1 Timer Functions
Internal clock of
asynchronous event
counter amended
9.2.1 Overview
174 Table 9.2 Timer A Registers Initial value amended
9.2.2 Register
Descriptions
174 1. Timer mode register A (TMA) Bits 7 to 5 amended
9.2.5 Application Note 178
9.2.5 Application Note
Description added
9.3.4 Operation
192 1. Timer F operation
Description amended
a. Operation in 16-bit timer mode
9.3.5 Application Note
196, 197
3. Clear timer FH, timer FL
Description added
interrupt request flags (IRRTFH,
IRRTFL), timer overflow flags H, L
(OVFH, OVFL) and compare match
flags H, L (CMFH, CMFL)
4. Timer counter (TCF) read/write
9.4.2 Register
Configurations
202 5. Input pin edge selection register Bit name amended
(AEGSR)
204 6. Event counter control register Bit name, R/W form, and
(ECCR)
description amended
205 7. Event counter control/status Bit name, R/W form, and
register (ECCSR)
description amended
10.1.4 Register
Configuration
220 Table 10.2 Registers
Initial value of serial port
control register amended
10.2 Register
Descriptions
227 10.2.6 Serial control register 3 Description of bit 5
(SCR3)
amended
240 10.2.10 Serial Port Control
Register (SPCR)
Bits 4, 1, and 0, and
description amended
12.2 Register
Descriptions
286, 287 12.2.2 A/D Mode Register (AMR) Bit 6 amended
12.6 Application Notes 294
12.6 Application Notes
4th note added
13.1.4 Register
Configuration
297 Table 13.2 LCD Controller/Driver Initial values amended
Registers
5 Page Contents
Section 1 Overview..............................................................................................................
1.1 Overview............................................................................................................................
1.2 Internal Block Diagram......................................................................................................
1.3 Pin Arrangement and Functions.........................................................................................
1.3.1 Pin Arrangement ...................................................................................................
1.3.2 Pin Functions ........................................................................................................
1
1
5
6
6
8
Section 2 CPU........................................................................................................................
2.1 Overview............................................................................................................................
2.1.1 Features .................................................................................................................
2.1.2 Address Space.......................................................................................................
2.1.3 Register Configuration..........................................................................................
2.2 Register Descriptions .........................................................................................................
2.2.1 General Registers..................................................................................................
2.2.2 Control Registers ..................................................................................................
2.2.3 Initial Register Values ..........................................................................................
2.3 Data Formats......................................................................................................................
2.3.1 Data Formats in General Registers .......................................................................
2.3.2 Memory Data Formats..........................................................................................
2.4 Addressing Modes..............................................................................................................
2.4.1 Addressing Modes ................................................................................................
2.4.2 Effective Address Calculation ..............................................................................
2.5 Instruction Set ....................................................................................................................
2.5.1 Data Transfer Instructions ....................................................................................
2.5.2 Arithmetic Operations ..........................................................................................
2.5.3 Logic Operations ..................................................................................................
2.5.4 Shift Operations ....................................................................................................
2.5.5 Bit Manipulations .................................................................................................
2.5.6 Branching Instructions..........................................................................................
2.5.7 System Control Instructions..................................................................................
2.5.8 Block Data Transfer Instruction............................................................................
2.6 Basic Operational Timing ..................................................................................................
2.6.1 Access to On-Chip Memory (RAM, ROM) .........................................................
2.6.2 Access to On-Chip Peripheral Modules................................................................
2.7 CPU States .........................................................................................................................
2.7.1 Overview...............................................................................................................
2.7.2 Program Execution State ......................................................................................
2.7.3 Program Halt State................................................................................................
2.7.4 Exception-Handling State .....................................................................................
11
11
11
12
12
13
13
13
14
15
16
17
18
18
20
24
26
28
29
29
31
35
37
38
40
40
41
43
43
44
44
44
i
11 Page |
Páginas | Total 70 Páginas | |
PDF Descargar | [ Datasheet HD6433801FP.PDF ] |
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HD6433801FP | Single-Chip Microcomputer | Hitachi Semiconductor |
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