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PDF ML610340 Data sheet ( Hoja de datos )
| Número de pieza | ML610340 | |
| Descripción | 8-bit Microcontroller | |
| Fabricantes | LAPIS Semiconductor | |
| Logotipo |  |
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ML610Q340/ML610340
8-bit Microcontroller with Voice Output Function
FEDL610Q340FULL-01
Issue Date: January 7, 2010
GENERAL DESCRIPTION
Equipped with an LAPIS Semiconductor original 8-bit CPU nX-U8/100, the ML610Q340/ML610340 is a
high-performance 8-bit CMOS microcontroller that integrates a wide variety of peripherals such as a timer,
synchronous serial port, and voice output function. The nX-U8/100 CPU is capable of executing instructions
efficiently on a one-instruction-per-clock-pulse basis through parallel processing by the 3-stage pipelined
architecture. The microcontroller is also equipped with a flash memory that has achieved low voltage and low
power consumption (at read) equivalent to mask ROMs, so it is best suited to battery-driven applications such as
cellular phones. In addition, it has an on-chip debugging function, which allows software debugging/rewriting
with the LSI mounted on the board.
FEATURES
CPU
8-bit RISC CPU (CPU name: nX-U8/100)
Instruction repertoire: 16-bit length instructions
Instruction set: Transfer, arithmetic operations, comparison, logical operations, multiply/divide operations,
bit manipulation, bit logical operations, jump, conditional jump, call return stack manipulation, and
arithmetic shift instructions.
Built-in on-chip debugging function
Minimum instruction execution time:
0.244 s (@ 4.096 MHz system clock)
Internal memory
ML610Q340
Has 96-Kbyte flash memory (48K 16-bit) built in. (including unusable 1KByte TEST area)
ML610340
Has 96-Kbyte mask memory (48K 16-bit) built in. (including unusable 1KByte TEST area)
Has 512-byte RAM (512 8-bit) built in.
Interrupt controller
Non-maskable interrupt: 2 sources (1 internal source and 1 external sources)
Maskable interrupt: 12 sources (8 internal sources and 4 external sources)
Time-base counter
Low-speed side time-base counter 1ch
High-speed side time-base counter 1ch
Watchdog timer
Generates a non-maskable interrupt upon the first overflow and a system reset occurs upon the second
Free-running
Selectable overflow period: 4 types (125 ms, 500 ms, 2 sec, 8 sec)
Timer
8-bit 2ch (16-bit configuration also enabled)
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1 page  
PIN CONFIGURATION
ML610Q340 SSOP package product
FEDL610Q340FULL-01
ML610Q340/340
NC: No Connection
Figure 3 Pin Configuration of ML610Q340 Package Product
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5 Page 
FEDL610Q340FULL-01
ML610Q340/340
TERMINATION OF UNUSED PINS
How to Terminate Unused Pins
VPP
RESET_N
TEST
SPVDD
SPVSS
AOUT
SPIN
SG
SPP
SPM
P00–P03
P20–P23
P40–P43
Pin
Recommended pin termination
Open
Open
Open
VSS
VSS
Open
Open
Open
Open
Open
VDD or VSS
Open
Open
Note:
It is recommended to configure the unused input ports and input/output ports as inputs with pull-down
resistors/pull-up resistors or outputs since the supply current may become excessively large if those pins are left
open in the high impedance input setting.
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11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet ML610340.PDF ] | |
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