74LS30 데이터시트 PDF ( Data sheet )

SN54, 74LS30 8-INPUT NAND GATE 8-INPUT NAND GATE VCC 14 13 12 11 10 9 8 LOW POWER SCHOTTKY 1 2 3 4 5 6 7 GND 14 1 J SUFFIX CERAMIC CASE 632-08 14 1 N SUFFIX PLASTIC CASE 646-06 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN SN74LSXXD Ceramic Plastic SOIC GUA

DM74LS30 8-Input NAND Gate May 1986 Revised March 2000 DM74LS30 8-Input NAND Gate General Description This device contains a single gate which performs the logic NAND function. Ordering Code: Order Number DM74LS30M DM74LS30N Package Number M14A N14A Package Description 14-Lead Small Outline Integ

Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 0.05 0° 15° + 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) DP-14 Conforms Conforms 0.97 g Unit: mm 10.06 10.5 Max 14 8 5.5 1 7 *0.22 ± 0.05 0.20 ± 0.

54LS30 DM54LS30 DM74LS30 8-Input NAND Gate June 1989 54LS30 DM54LS30 DM74LS30 8-Input NAND Gate General Description This device contains a single gate which performs the logic NAND function Features Y Alternate Military Aerospace device (54LS30) is available Contact a National Semiconductor Sale

74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs December 2013 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs Features ■ 5V tolerant inputs ■ 2.3V 3.6V VCC specifications provided ■ 5.2ns tPD max. (VCC = 3.3V), 10 A ICC max. ■ Power down high impedan

74LCX00 Low-voltage CMOS quad dual input NAND gate with 5 V tolerant inputs Datasheet production data Features ■ 5 V tolerant inputs ■ High speed tPD = 4.3 ns (max.) at VCC = 3 V ■ Power-down protection on inputs and outputs ■ Symmetrical output impedance |IOH| = IOL = 24 mA (min.) at