74LVX125 데이터시트 PDF ( Data sheet )

74LVX125 Low-Voltage Quad Buffer with TRI-STATE Outputs January 1996 74LVX125 Low-Voltage Quad Buffer with TRI-STATE Outputs General Description The LVX125 contains four independent non-inverting buffers with TRI-STATE outputs The inputs tolerate voltages up to 7V allowing the interface of 5V sys

74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs February 2008 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs Features ■ Input voltage level translation from 5V to 3V ■ Ideal for low power, low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic

74LVX125 LOW VOLTAGE QUAD BUS BUFFERS (3-STATE) WITH 5V TOLERANT INPUTS s s s s HIGH SPEED: tPD=4.4ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA=25°C LOW NOISE: VOLP = 0

74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs December 2013 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs Features ■ 5V tolerant inputs ■ 2.3V 3.6V VCC specifications provided ■ 5.2ns tPD max. (VCC = 3.3V), 10 A ICC max. ■ Power down high impedan

74LCX00 Low-voltage CMOS quad dual input NAND gate with 5 V tolerant inputs Datasheet production data Features ■ 5 V tolerant inputs ■ High speed tPD = 4.3 ns (max.) at VCC = 3 V ■ Power-down protection on inputs and outputs ■ Symmetrical output impedance |IOH| = IOL = 24 mA (min.) at