SPU30N03S2L-10 데이터시트 PDF ( Data sheet )

Preliminary data SPU30N03S2L-10 OptiMOS
Power-Transistor Feature Product Summary VDS RDS(on) ID 30 10 30 P-TO251  N-Channel  Logic Level  Low on-resistance RDS(on)  Excellent Gate Charge x RDS(on) product (FOM) 175°C operating temperature  Avalanche rated  dv, dt rated Ideal for fas

Rev. 2.0 SPU01N60C3 SPD01N60C3 VDS @ Tjmax RDS(on) ID P-TO252 Cool MOS™ Power Transistor Feature New revolutionary high voltage technology Ultra low gate charge Periodic avalanche rated Extreme dv, dt rated Ultra low effective capacitances Improved transconductance 650 6 0.8 V Ω A P-T

Preliminary data SPD02N60 SPU02N60 SIPMOS® Power Transistor N-Channel Enhancement mode Avalanche rated Pin 1 G Pin 2 D Pin 3 S Type SPD02N60 SPU02N60 VDS ID 600 V 2 A RDS(on) @ VGS Package VGS = 10 V P-TO252 5.5 Ω P-TO251 Ordering Code Q67040-S4133 Q67040-S4127-A2 Maximum Ratings

Final data SPD02N60C3 SPU02N60C3 VDS @ Tjmax RDS(on) ID P-TO251 Cool MOS™ Power Transistor Feature New revolutionary high voltage technology Ultra low gate charge Periodic avalanche rated Extreme 650 3 1.8 P-TO252 V Ω A dv, dt rated Ultra low effective capacitances Type SPD02N60C3 S