SI5367 데이터시트 PDF ( Data sheet )

Si5367 P-PROGRAMMABLE PRECISION CLOCK MULTIPLIER Features Not recommended for new Five clock outputs with selectable designs. For alternatives, see the signal format (LVPECL, LVDS, Si533x family of products. CML, CMOS) Generates any frequency from Support for ITU G.709 FEC ratios 2 kH-

Si500D D IFFERENTIAL O UTPUT S I L I C O N O SCILLATOR Features Quartz-free, MEMS-free, and PLL-free all-silicon oscillator Any output frequencies from 0.9 to 200 MH- Short lead times Excellent temperature stability (±20 ppm) Highly reliable startup and operation High immunity to shock an

Si5010 OC-12, 3, STM-4, 1 SONET, SDH C LOCK Features Complete CDR solution includes the following: ! ! ! ! ! AND D ATA R ECOVERY IC Supports OC-12, 3, STM-4, 1 Low Power, 293 mW (TYP OC-12) Small Footprint: 4 mm x 4 mm DSPLL™ Eliminates External Loop Filter Components 3.3 V Tolerant Control Inp

Si5013 OC-12, 3, STM-4, 1 SONET, SDH CDR IC WITH L IMITING A MPLIFIER Features High-speed clock and data recovery device with integrated limiting amplifier: ! ! ! ! ! Supports OC-12, 3, STM-4, 1 DSPLL™ technology Jitter generation 2.3 mUIrms (typ) ! ! ! Loss-of-signal level alarm Data slicing l