UR533의 가격 정보 및 구매처를 확인 할 수 있습니다. |
|
검색 결과 목록
UR533 5A ADJUSTABLE/FIXED ULTRA LOW DROP-OUT LINEAR REGULATOR
UNISONIC TECHNOLOGIES CO., LTD UR533
5A ADJUSTABLE, FIXED ULTRA LOW DROP-OUT LINEAR REGULATOR
DESCRIPTION
The UTC UR533 is ultra-low dropout regulators with 5A output current capability. This device has been optimized for low voltage applications including VTT bus termination, where transient resp ![]() ![]() Unisonic Technologies |
국내 전자부품 판매점 |
디바이스마트 IC114 엘레파츠 ICbanQ |
관련 검색 목록
UR5512 2A DDR BUS TERMINATION REGULATOR
UNISONIC TECHNOLOGIES CO., LTD UR5512
2A DDR BUS TERMINATION REGULATOR
DESCRIPTION
The UR5512 is a linear regulator which provides up to 2 Amp bi-directional driving and sinking capability for DDR SDRAM bus terminator application. The output termination voltage tracks the reference voltage applied ![]() Unisonic Technologies ![]() |
UR5515 1.5A/3A BUS TERMINATION REGULATOR
UNISONIC TECHNOLOGIES CO., LTD UR5515
1.5A, 3A BUS TERMINATION REGULATOR
SOP-8
DESCRIPTION
The UTC UR5515 is a linear bus termination regulator and designed to convert voltage supplies ranging from 1.6V~6.0V into a desired output voltage, which adjusted by two external voltage divider resistors. T ![]() Unisonic Technologies ![]() |
UR5516 3A BUS TERMINATION REGULATOR
UNISONIC TECHNOLOGIES CO., LTD UR5516
3A BUS TERMINATION REGULATOR
DESCRIPTION
The UTC UR5516 is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination. Current-limit work to limit the short-circuit current, on-chip thermal shutdown provides protection ![]() Unisonic Technologies ![]() |
UR5595 DDR TERMINATION REGULATOR
UNISONIC TECHNOLOGIES CO., LTD UR5595
DDR TERMINATION REGULATOR
DESCRIPTION
MOS IC
The UTC UR5595 is a linear bus termination regulator designed to meet JEDEC SSTL-2 and SSTL-3 (Stub Series Terminated Logic) specifications for termination of DDR-SDRAM. The device contains a high-speed operation ![]() Unisonic Technologies ![]() |
UR5596 MOS IC
UNISONIC TECHNOLOGIES CO.,LTD UR5596
DDR TERMINATION REGULATOR
DESCRIPTION
The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL(High-Speed Transceiver ![]() Unisonic Technologies ![]() |
국내 및 해외 전자부품 구매 정보 및 가격정보를 쉽게 확인 할수 있습니다. 부품 번호 및 기타 주요 기준별로 결과를 필터링하여 필요한 정확한 데이터시트를 쉽게 찾을 수 있습니다. |
검색결과에 표시되지 않는 내용은 수일내에 자동으로 업데이트 됩니다. 이 페이지에 대한 링크를 허용합니다. |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 신규 | 맵 : 1, 2 |