74S04의 가격 정보 및 구매처를 확인 할 수 있습니다. |
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74S04 HEX INVERTING GATES DM54S04 DM74S04 Hex Inverting Gates
DM54S04 DM74S04 Hex Inverting Gates
General Description
This device contains six independent gates each of which performs the logic INVERT function
Connection Diagram
Dual-In-Line Package
June 1989
TL F 6442 1
Order Number DM54S04J DM54S04W DM74S04M or DM74S04 ![]() ![]() National Semiconductor |
국내 전자부품 판매점 |
디바이스마트 IC114 엘레파츠 ICbanQ |
관련 검색 목록
74S08 Quad 2-Input AND Gates DM54S08 DM74S08 Quad 2-Input AND Gates
DM54S08 DM74S08 Quad 2-Input AND Gates
General Description
This device contains four independent gates each of which performs the logic AND function
Connection Diagram
Dual-In-Line Package
June 1989
Function Table
Order Number DM54S08J DM54S08W or DM74S0 ![]() National Semiconductor ![]() |
74S08 Quadruple 2-Input Positive-AND Gates ![]() Texas Instruments ![]() |
74S08N Quad 2-Input AND Gate DM74S08 Quad 2-Input AND Gate
March 1996 Revised April 2000
DM74S08 Quad 2-Input AND Gate
General Description
This device contains four independent gates each of which performs the logic AND function.
Ordering Code:
Order Number Package Number
Package Description
DM74S08N
N14A
14-Lead Plasti ![]() Fairchild Semiconductor ![]() |
74S10 STTL type three 3-input NAND gate 54S10, 74S10 STTL 型三 3 入 非 典型 : tpd=3ns Pd=19mW, 每 路 (1, 3)
符
式: 外引 排列 : 表:
入 B H × L × 出 Y L H H H
A H L × ×
C H × × L
推 工作 件
74Ⅱ 符 Vcc VIH VIL IOH IOL TA 名 最小 源 入高 平 入低 平 出高 平 流 � ![]() TW ![]() |
74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
August 1986 Revised April 2000
DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
General Description
This device contains two ![]() Fairchild Semiconductor ![]() |
국내 및 해외 전자부품 구매 정보 및 가격정보를 쉽게 확인 할수 있습니다. 부품 번호 및 기타 주요 기준별로 결과를 필터링하여 필요한 정확한 데이터시트를 쉽게 찾을 수 있습니다. |
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DataSheet.kr | 2020 | 연락처 | 링크모음 | 신규 | 맵 : 1, 2 |